A Survey on Power Reduction Techniques in FIR Filter

Abstract

There are different parameters need to be focused while designing a VLSI circuit. Some of them are power, area, and speed. Hence these can be referred as challenging problems. Out of these, power dissipation is a critical parameter in modern VLSI design field. Multiplication occurs frequently in finite impulse response (FIR) filters, fast Fourier transforms, discrete cosine transforms, convolution, and to save significant power consumption of a VLSI design, it is a good direction to reduce its dynamic power that is the major part of total power dissipation. This paper summarizes and examines techniques which are involved in multipliers. It broadly covers Booth multipliers, Wallace tree multipliers and Distributed arithmetic Multipliers.

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